DeePhi

Name: DeePhi
Brand: DeePhi

DeePhi was acquired by Xilinx Inc. in July 2018

Est 2016|Valuation $251.9M|Raised $40M|4 Ref Customers

LinkedIn 643|Website|FTEs 21|HQ 北京, Beijing, CN

- Where DeePhi/DNNDK historically aligned: It provided an end-to-end path for CNN inference on Xilinx FPGA platforms using a DPU abstraction with model compression, quantization, compilation, and runtime components. - Where alternatives are stronger today: - Vitis AI represents the maintained vendor direction and has been the focus for newer runtimes and model formats. - GPU-based Jetson/TensorRT solutions often have more developer resources and a different tradeoff profile (higher throughput at higher power in many cases). - Intel OpenVINO with FPGA runtime plugins appeals to environments standardized on OpenVINO and heterogeneous execution. - NVDLA and similar open IP approaches are relevant where SoC integration and open accelerator IP are priorities but bring integration overhead.

01Competitive Landscape

Narrative analysis

Where DeePhi/DNNDK historically aligned: It provided an end-to-end path for CNN inference on Xilinx FPGA platforms using a DPU abstraction with model compression, quantization, compilation, and runtime components.
Where alternatives are stronger today:
- Vitis AI represents the maintained vendor direction and has been the focus for newer runtimes and model formats.
- GPU-based Jetson/TensorRT solutions often have more developer resources and a different tradeoff profile (higher throughput at higher power in many cases).
- Intel OpenVINO with FPGA runtime plugins appeals to environments standardized on OpenVINO and heterogeneous execution.
- NVDLA and similar open IP approaches are relevant where SoC integration and open accelerator IP are priorities but bring integration overhead.

	DeePhi / DNNDK (legacy)	AMD/Xilinx Vitis AI (current ecosystem direction)	Intel OpenVINO + FPGA AI Suite
Starting Price	Not clearly published; historically available by download after registration plus toolchain costs	Varies; part of AMD/Xilinx ecosystem; pricing not always transparent	Suite/tooling plus FPGA platform costs; enterprise tooling varies
Best For	Legacy Zynq DPU deployments and teams maintaining DNNDK pipelines	New AMD adaptive SoC/FPGA inference projects; maintained runtimes and model formats	Intel FPGA-based inference flows and teams standardized on OpenVINO
Key Strength	Earlier integrated flow for DPU-based inference with model compression and toolchain integration	Ongoing vendor support, updated documentation, and broader model flow support	OpenVINO integration and plugin-based FPGA runtime options
Key Weakness	Deprecation risk, legacy artifacts and link rot, migration burden	Rapid evolution and architecture changes may require rework	FPGA deployment complexity and ecosystem fit considerations

DeePhi

01Competitive Landscape

Narrative analysis

02Market Map

01Competitive Landscape

Narrative analysis

02Market Map